The GS1559 is a reclocking deserializer with a serial loop-through cable driver. When used in conjunction with the GS1574 Automatic Cable Equalizer and the GO1555/GO1525* Voltage Controlled Oscillator, a receive solution can be realized for HD-SDI, SD-SDI and DVB-ASI applications.
In addition to reclocking and deserializing the input data stream, the GS1559 performs NRZI-to-NRZ decoding, descrambling as per SMPTE 292M/259M-C, and word alignment when operating in SMPTE mode. When operating in DVB-ASI mode, the device will word align the data to K28.5 sync characters and 8b/10b decode the received stream.
Two serial digital input buffers are provided with a 2x1 multiplexer to allow the device to select from one of two serial digital input signals.
The integrated reclocker features a very wide Input Jitter Tolerance of ±0.3 UI (total 0.6 UI), a rapid asynchronous lock time, and full compliance with DVB-ASI data streams.
An integrated cable driver is provided for serial input loop-through applications and can be selected to output either buffered or reclocked data. This cable driver also features an output mute on loss of signal, high impedance mode, adjustable signal swing, and automatic dual slew-rate selection depending on HD/SD operational requirements.
The GS1559 also includes a range of data processing functions such as error detection and correction, automatic standards detection, and EDH support. The device can also detect and extract SMPTE 352M payload identifier packets and independently identify the received video standard. This information is read from internal registers via the host interface port.
Line-based CRC errors, line number errors, TRS errors, EDH CRC errors and ancillary data checksum errors can all be detected. A single 'DATA_ERROR' pin is provided which is a logical 'OR'ing of all detectable errors. Individual error status is stored in internal 'ERROR_STATUS' registers.
Finally, the device can correct detected errors and insert new TRS ID words, line-based CRC words, ancillary data checksum words, EDH CRC words, and line numbers. Illegal code re-mapping is also available. All processing functions may be individually enabled or disabled via host interface control.
* For new designs use GO1555
SMPTE 292M and SMPTE 259M-C compliant descrambling and NRZI -> NRZ decoding (with bypass)
DVB-ASI sync word detection and 8b/10b decoding
auto-configuration for HD-SDI, SD-SDI and DVB-ASI
serial loop-through cable driver output selectable as reclocked or non-reclocked
dual serial digital input buffers with 2 x 1 mux
integrated serial digital signal termination
integrated reclocker
automatic or manual rate selection / indication (HD/SD)
descrambler bypass option
selectable additional processing features including:
CRC, TRS, ANC data checksum, line number and EDH CRC error detection and correction
programmable ANC data detection
illegal code remapping
internal flywheel for noise immune H, V, F extraction
FIFO load Pulse
20-bit / 10-bit CMOS parallel output data bus
148.5MHz / 74.25MHz / 27MHz / 13.5MHz parallel digital output
automatic standards detection and indication
1.8V core power supply and 3.3V charge pump power supply
3.3V digital I/O supply
JTAG test interface
Available in a Pb-free package
small footprint (11mm x 11mm)
SMPTE 292M Serial Digital Interfaces
SMPTE 259M-C Serial Digital Interfaces
DVB-ASI Serial Digital Interfaces
