GN1405C

Overview

The GN1405C is a monolithic integrated circuit that enables serial backplane communication at 1.25Gb/s, 2.5Gb/s, or 5Gb/s by translating between a low speed 1.25Gb/s LVDS (ASIC) interface and a high-speed 5Gb/s CML interface using bit interleaving and bit de-interleaving.

The GN1405C is a quad device; thus there are four high-speed serial lanes in each direction operating at up to 5Gb/s, translating to 40Gb/s full duplex bandwidth.In the GN1405C, each high-speed serial input interface includes an integrated high IJT clock and data recovery circuit with equalization.Each high-speed serial output interface features very low jitter and allows for amplitude adjustment through the use of dedicated pins.The parallel interface is comprised of two 8-channel source synchronous 1.25Gb/s LVDS lines in each direction. Rate selection is made using dedicated pins, which determine the mapping of 1.25Gb/s parallel channels to/from the high-speed serial channels

Features/Highlights

  • Multi-rate serial operation: 1.25Gb/s, 2.5Gb/s, or 5Gb/s per channel
  • Low output jitter
  • 1.25Gb/s Source Synchronous LVDS parallel interface
  • 625MHz DDR clocking on source synchronous interface
  • 125MHz HSTL system clock input
  • High input jitter tolerance clock and data recovery
  • Equalization on serial inputs enables communication over 30 inches of 10 mil traces at 5Gb/s
  • Serial and parallel loopback modes
  • On-chip 100 ohms differential input/output termination
  • Serial output level adjustment control
  • Package size 23mm × 23mm
  • Key Applications

    Multi-rate serial backplane communication

    Ordering Information

    Part No

    Package

    GN1405C-CB

    484 pin BGA

    DocumentTypeSize
    application/pdf
    GN1405C Quad 5Gb/s SerDes with Equalizer Datasheet483 kB
    application/zip
    MIMCap Stress Test Experiment PCB Drawing327 kB
    GN1405C Quad 5Gbps SerDes with Equalizer Product Brief139 kB


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